Digital detection of visual and infrared images is a very widely used technology, ranging from consumer-oriented camera and video apparatus to law enforcement and military applications. For virtually all of these applications there is a growing demand for higher image pixel counts, higher pixel density, increased sensitivity, improved dynamic range, and faster image processing.
In particular, many emerging thermal infrared (IR) sensing applications simultaneously demand high sensitivity, large dynamic range, large pixel count, and operation at fast data rates. Among these applications are day/night persistent surveillance, border patrol and protection, aerial search and rescue, and environmental remote sensing. Such applications typically require sensor systems capable of high-quality, large-pixel-count images. Furthermore, in many cases, the images must be processed rapidly to extract time-critical information. For example, real-time feature extraction that localizes a region of interest can be a key component of a high-resolution, wide-area imaging system. Organizations such as the US Army Night Vision and Electronic Sensors Directorate (NVESD) are also demanding even higher pixel counts and densities. These requirements are driving a demand for high-capacity image processing.
At the heart of all digital imaging systems is the Focal Planar Array (“FPA”), which is a two-dimensional array of elements upon which an image is focused, whereby each of the FPA elements or “pixels” develops an analog output “signal charge” that is proportional to the intensity of the light that is impinging on it. Traditionally, a readout integrated circuit (“ROIC”) uses an integration capacitor to store the signal charge at each pixel of the FPA, and then routes the analog signals onto output taps for readout and digitization by external analog-to-digital converters (“ADC's”). However, this approach requires storing a large signal charge at each pixel site, and further requires that an adequate signal-to-noise ratio and dynamic range be maintained as the analog signals are read out and digitized. Accordingly, this traditional approach suffers from sensitivity and dynamic range limitations.
One approach for improving the sensitivity and dynamic range of an imaging system is to include “in-pixel” ADC circuits within the ROIC, whereby a separate digitizing circuit is located proximal to each pixel (or to each localized group of pixels) so that the signal charges for the pixels are digitized before being read out of the ROIC. However, conventional ADC circuits comprise large numbers of flip-flops and other digital elements, and as a result they are bulky and limit the pixel density that can be provided by this approach.
A more compact in-pixel ADC can be implemented by dedicating a small in-pixel integration capacitor, comparator, and binary digital counter to each pixel (or localized group of pixels). According to this approach, for each pixel, the associated small integration capacitor is charged by the signal charge of the pixel, while the comparator monitors the charge of the integration capacitor and issues an output pulse spike that resets the integration capacitor each time the integrated charge reaches a specified threshold value. The comparator thereby issues a train of output pulses, which are counted by the binary digital counter.
The train of pulses from the comparator terminates when the signal charge of the pixel is fully drained by the integration capacitor, or when the measurement ends, such that the number of pulses counted by the counter represents a digital measurement of the amplitude of the signal charge, with the reset threshold value of the comparator representing the least significant bit accuracy of the measurement. The total number of spikes is retained by the binary counter until it is read out by the multiplexer of the ROIC.
This in-pixel binary counter approach allows for an increased dynamic range, due to the ability to add bits to the binary counter. However, while this approach is an improvement over earlier methods in terms of dynamic range, the requirement for in-pixel binary digital counters still places a significant limit on the achievable pixel density, which can be unacceptable for some applications, such as the NVESD requirement for degraded visual environment and hostile fire detection and location systems.
What is needed, therefore, is an ROIC that provides in-pixel digitization of signal charges without requiring a conventional binary digital counter.